CACHE DEVICE
PROBLEM TO BE SOLVED: To reduce the quantity of data transfer between a main memory and a cache memory and to reduce overhead due to the use of an external bus when registers are continuously retreated/restored to/from a stack area in a microprocessor loaded with a cache mechanism. SOLUTION: When th...
Gespeichert in:
1. Verfasser: | |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | PROBLEM TO BE SOLVED: To reduce the quantity of data transfer between a main memory and a cache memory and to reduce overhead due to the use of an external bus when registers are continuously retreated/restored to/from a stack area in a microprocessor loaded with a cache mechanism. SOLUTION: When the registers are continuously retreated to the stack, a memory control device writes data from a processor core to the cache memory without executing refilling processing from the main memory to the cache memory. When the registers are continuously restored from the stack, the memory control device forcibly clears a dirty bit on a hit cache entry simultaneously with the reading of data from the cache memory by the processor core. Consequently, the retreating/restoring processing of registers to/from the stack area can be accelerated. |
---|