POWER INTERRUPTION PROCESSING SYSTEM FOR NON-VOLATILE MEMORY AND METHOD

PROBLEM TO BE SOLVED: To provide a power interruption processing system for a non-volatile memory and a method. SOLUTION: Groups of state displays are related in which erasion can be performed for each sector being an erasion unit when a non-volatile memory is erased independently of the sector. Before erasion operation is performed for the sector, an interruption state is displayed on a state display, also, when erasion operation is finished successfully, its interruption state display is erased. When a power source of the non-volatile memory is applied again, a state of a state display is checked by a state mechanism, when a state display displaying an interruption state exists, it is recognized that erasion of sectors relating it is not finished, erasion operation for the sector is performed again.