METHOD OF MANUFACTURING SEMICONDUCTOR ELEMENT

PROBLEM TO BE SOLVED: To reduce the number of processing steps when manufacturing a semiconductor element having a via, which is formed through a material having a low permittivity. SOLUTION: A first conductive layer is formed near the substrate, an etching stopping layer is formed on the first cond...

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Bibliographische Detailangaben
Hauptverfasser: MOLLOY SIMON JOHN, ROY PRADIP K, NEISU RAYADI, MERCHANT SAILESH M
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To reduce the number of processing steps when manufacturing a semiconductor element having a via, which is formed through a material having a low permittivity. SOLUTION: A first conductive layer is formed near the substrate, an etching stopping layer is formed on the first conductive layer, and a dielectric layer is formed on the etching stopping layer. The dielectric layer contains a material having a low permittivity, a via is formed through the dielectric layer to expose the etching stopping layer at the bottom, and a perforated sidewall is formed. At the same time, an etching agent is used which acts together with a material etched from the etching stopping layer. Thus, a polymeric layer covering the sidewall having holes of the via is formed to reduce the steps. On a rear sidewall having a polymeric material etched from the bottom of the via, a barrier metallic layer is formed on the polymeric layer. Further, a seed layer is formed on the barrier metallic layer, and a second conductive layer making contact with the first conductive layer in the via is formed on the seed layer.