METHOD FOR CALCULATING DELAY TIME OF INTEGRATED CIRCUIT

PROBLEM TO BE SOLVED: To provide a method for calculating delay time of an integrated circuit which improves the precision of calculating delay without setting excessive design margins in consideration of delay deterioration due to temperature rises, simulation errors, and reliability in design at gate levels. SOLUTION: A circuit read-in part 101 reads a net list which carries connecting information and logic names of logic cells in an integrated circuit, and an instance specifying part 102 specifies the logic cell of an arbitrary logic name in the net list. A delay time change part 104 changes delay time with regard to the delay of a specified logic cell on the basis of a parameter decided by a delay change parameter decision part 103 and a registered delay of a delay library 100, and a maximum/minimum delay time calculating part 106 decides a maximum propagation delay time and a minimum propagation delay time from the delay of a specified logic cell and that of an out-of-specification logic cell.