DATA TRANSFER CIRCUIT OF SEMICONDUCTOR MEMORY

PROBLEM TO BE SOLVED: To dissolve such a problem that junction capacity and wiring capacity are increased as increasing capacity of a storage device and an access time is lengthened due to lengthening of a data transfer time. SOLUTION: In a semiconductor memory which is connected to a pair of data read-out line transferring output of plural sense amplifiers amplifying data of selected plural memory cell matrixes through a switch, which selects amplified data of a desired column line from the sense amplifier by opening and closing of a switch, and transfers data to the pair of read-out line, a bit line equalizer circuit is provided in the sense amplifier, in a standby period, a pair of bit line of the sense amplifier operated complementarily is set to a high level, in a read-out state, only one side of the pair of bit line is made a ground level, and an opposite phase signal of the pair of bit line is inputted to a gate of a transistor connecting a read-out line and a ground level.