METHOD FOR SYNCHRONIZING OPERATION OF CPU PIPE LINE AND FPU PIPE LINE AND COMPUTER SYSTEM

PROBLEM TO BE SOLVED: To improve performance such as processing capabilities by closely synchronizing both arithmetic operations. SOLUTION: In a method for synchronizing the operations of CPU and FPU execution pipe lines 160 and 162, an instruction is received in a first CPU pipe stage, and the inst...

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Hauptverfasser: GEARTY MARGARET ROSE, CHIIJUI PEN
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To improve performance such as processing capabilities by closely synchronizing both arithmetic operations. SOLUTION: In a method for synchronizing the operations of CPU and FPU execution pipe lines 160 and 162, an instruction is received in a first CPU pipe stage, and the instruction is received in a corresponding first FPU pipe stage, and the instruction is processed in the first CPU pipe stage, and the instruction is processed in the first FPU pipe stage to that the instructions can be processed by the first CPU (FPU) pipe stages. Then, a first (second) signal for displaying that progress to the second pipe stage is prepared in the CPU (FPU) pipe line is generated by the first CPU pipe stage, and the instruction is transmitted from the first CPU (FPU) pipe stage to the second pipe stage in the CPU pipe line, and the instruction is transmitted from the second pipe stage in the CPU (FPU) pipe line to the third pipe stage in the CPU (FPU) pipe line in response to the second (first) signal. A corresponding devices are also provided.