INTEGRATED CIRCUIT FOR PERFORMING BURN-IN TEST OF AC STRESS AND TESTING METHOD USING THE SAME

PROBLEM TO BE SOLVED: To apply successive and repetitive stress to all storage elements by changing the address of the storage element being selected in response to a specific clock signal, generating a data signal that alternately has first and second states in response to the clock signal, and fee...

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Bibliographische Detailangaben
Hauptverfasser: SIN YUN-SEUNG, KIN TOO, KWAK CHOONG-KEUN, KAN SOSHU
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To apply successive and repetitive stress to all storage elements by changing the address of the storage element being selected in response to a specific clock signal, generating a data signal that alternately has first and second states in response to the clock signal, and feeding the data signal to a selected storage element. SOLUTION: A power supply is applied to a burn-in power supply terminal 10, a burn-in grounding terminal 20 is grounded to a grounding voltage VSS, and a constant clock signal CLK is applied to a clock signal terminal 30. A pulse generator 360 is used for generating a pulse word line, and a pulse signal PUL with a short activation width is generated in response to the transition of a data signal DAT and is applied to a main row decoder part 330 for activating the word line. In a burn-in test operation mode, a control signal XWBI is in 'low' state, thus turning on a switch 500 that is a PMOS transistor.