MULTILAYERED INTERCONNECTION STRUCTURE AND ELECTRONIC PACKAGE

PROBLEM TO BE SOLVED: To provide an electronic package mounted with an integrated circuit, and a method of manufacturing the electronic package. SOLUTION: An electronic package 10 is equipped with a semiconductor chip 12 and a multilayer interconnection structure 18. The semiconductor chip 2 is poss...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: DAVID B STONE, JOHN S KURIIJU, ROBERT D SEBESUTA, JAMES R WILCOCKS
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To provide an electronic package mounted with an integrated circuit, and a method of manufacturing the electronic package. SOLUTION: An electronic package 10 is equipped with a semiconductor chip 12 and a multilayer interconnection structure 18. The semiconductor chip 2 is possessed of contact members 16, which are provided on its one surface and connected to the multilayered interconnection structure 18 with a solder connection members 20. The multilayer interconnection structure 18 is so structure as to electrically interconnect the semiconductor chip 12 to a circuit-shaped board (e.g., circuit board) 100 through other solder connection members and provided with a thermally conductive layer 22 of a material which has a prescribed thickness and thermal expansion coefficient, so as to nearly prevent obstruction of solder connections between the first conductive members and the semiconductor chip 12. The electronic package 10 is possessed of a dielectric material that has an effective tensile stress which ensures sufficient compliance of the multilayered interconnection structure in operation.