SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

PROBLEM TO BE SOLVED: To increase the operational margin of a memory integrated, circuit with a logic for mounting a plurality of SRAM macrocells of the like and to contrive to increase the operational margin of a computer system comprising the memory integrated circuit with the logic as a cash memo...

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Hauptverfasser: MASUDA SHINICHIRO, TOMIZAWA MASAHIKO
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To increase the operational margin of a memory integrated, circuit with a logic for mounting a plurality of SRAM macrocells of the like and to contrive to increase the operational margin of a computer system comprising the memory integrated circuit with the logic as a cash memory, for example, or the like. SOLUTION: One pair of VCS generating circuits VCSGU and VCSGL are respectively arranged on both sides of X address decoders XD of STRAM marcocells, in short, on the high-temperature side of the decoders XD and the low-temperature side of the decoders XD and at the same time, output terminals VCSU and VCSD of those VCS generating circuits are coupled with each other, a transfer path for feeding an internal voltage VCS to a base of a bipolar transistor constituting a current source for word line drive circuits WD0 to WD31 of the decoders XD is constituted of resistors RS1 to RS31, which are series-coupled with each other, the resistance values of these resistors are set at a proper value and potentials in internal voltages VCS0 to VCS 31, which are fed to each word line drive circuit, are changed for offsetting changes in the output amplitude of a current switching circuit, which is accompanied by a change in the base-emitter voltage of the bipolar transistor constituting the current source.