SEMICONDUCTOR PACKAGE, AND MANUFACTURE THEREOF

PROBLEM TO BE SOLVED: To provide the manufacture of a wafer-level chip scale package, using a rewiring board. SOLUTION: This manufacture includes a stage of providing a rewiring board 130 which has a board foundation layer, a plurality of terminal pads 116 provided on that board foundation layer, a...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: KEN YOKAN, KYO SHIIN
Format: Patent
Sprache:eng
Schlagworte:
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