COPPER CMP METHOD FOR REDUCING DISHING AND EROSION

PROBLEM TO BE SOLVED: To planarize a Cu surface with reduced dishing and erosion, using chemical and mechanical polishing. SOLUTION: This method is for forming a Cu wiring of an integrated circuit with reduced dishing and erosion, using chemical and mechanical polishing. A conformal barrier layer 40...

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Bibliographische Detailangaben
Hauptverfasser:	VINCENT C KOOSHIUISU, SHINN GREGORY B
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS DRESSING OR CONDITIONING OF ABRADING SURFACES ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS GRINDING MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING PERFORMING OPERATIONS POLISHING SEMICONDUCTOR DEVICES TRANSPORTING
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Beschreibung
Zusammenfassung:	PROBLEM TO BE SOLVED: To planarize a Cu surface with reduced dishing and erosion, using chemical and mechanical polishing. SOLUTION: This method is for forming a Cu wiring of an integrated circuit with reduced dishing and erosion, using chemical and mechanical polishing. A conformal barrier layer 40 is formed on a Cu film 30 filling trenches 15 of a dielectric film 10. Before removing the Cu film from regions where no trench 15 will be overlapped, portions of the conformal barrier which do not overlap with the trenches 15 are removed, using the chemical and mechanical polishing. A resultant structure is planarized, using the chemical and mechanical polishing.