SEMICONDUCTOR STORAGE

PROBLEM TO BE SOLVED: To properly output a judgment result even when the frequency of an external clock is changed in an external clock synchronous semiconductor storage. SOLUTION: According to control signals CLK1 and CLK2 generated by responding to an external clock from a control clock generation...

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1. Verfasser: SADAYUKI HIDEKAZU
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To properly output a judgment result even when the frequency of an external clock is changed in an external clock synchronous semiconductor storage. SOLUTION: According to control signals CLK1 and CLK2 generated by responding to an external clock from a control clock generation circuit 12, the I/O timing of the data of a reading circuit 8 is controlled, and the timing for reading the data of a coincidence judgment circuit 11 and for outputting the judgment result of the read data is controlled. Thus the I/O timing of the coincidence judgment circuit 11 agrees with that of the reading circuit 8, even when the frequency of the external clock is changed, and hence the judgment result can be outputted correctly from an output buffer circuit 9.