DEVICE AND METHOD FOR PHASE LOCKING

PROBLEM TO BE SOLVED: To surely make a phase lock even if a spurious signal is present by comparing the phase of a limit signal with that of the reference signal of a phase-locked loop and generating an error signal for operating the frequency of a lock signal component. SOLUTION: After an adder 48...

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1. Verfasser: WESTERMAN STEPHEN J
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To surely make a phase lock even if a spurious signal is present by comparing the phase of a limit signal with that of the reference signal of a phase-locked loop and generating an error signal for operating the frequency of a lock signal component. SOLUTION: After an adder 48 adds a filtered feedback signal 51 and a drive signal 53, the addition signal is sent to a limiter 50 to generate a limit signal 55. The limit signal 55 is sent to a phase comparator 14, which receives the reference signal 13 of the phase-locked loop 43 as well. The phase comparator 14 generates an error signal 57 according to the phase comparison result obtained through the processing of a loop filter 19 and a loop amplifier 20 in the forward path of the phase-locked loop 43. The error signal 57 controls the frequency and phase of the signal 11 that a VCO 10 generates. The loop 43 is held in a phase-locked state when the error signal 57 is in a predetermined range.