Bi-CMOS SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND MANUFACTURE THEREOF

PROBLEM TO BE SOLVED: To prevent reduction in reliability due to reduction in the gate breakdown voltage of a capacitor which is associated with the thinner oxide film formation for a MOS-type capacitive element, in a Bi-CMOS integrated circuit device having the MOS-type capacitive element. SOLUTION...

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Bibliographische Detailangaben
Hauptverfasser: IWAHASHI MASAYUKI, KATO MASATAKA
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To prevent reduction in reliability due to reduction in the gate breakdown voltage of a capacitor which is associated with the thinner oxide film formation for a MOS-type capacitive element, in a Bi-CMOS integrated circuit device having the MOS-type capacitive element. SOLUTION: This Bi-CMOS integrated circuit device comprises MOS-type capacitive elements, each having a first electrode which is a conducting film formed in a first element-forming region of a semiconductor substrate through an insulating film, and diodes each formed in a second element-forming region of the substrate. A plurality of MOS-type capacitive elements C1 and C2, each having the first electrode formed on the substrate are connected in series with each other by a metallic interconnection 21. One end of the series-connected elements C1 and C2 is connected to a power supply line L1, and the other end thereof to a signal line L2. A plurality or diodes D1 and D2 formed on the substrate are connected in series with each other by a metallic interconnection 22. One end of the series-connected diodes D1 and D2 is connected to the line L1 and the other end thereof is connected to the line L2. A metallic interconnection 27 connects the respective intermediate nodes between the series-connected elements C1 and C2 and the series-connected diodes D1 and D2.