ELECTRONIC TUNER

PROBLEM TO BE SOLVED: To provide the electronic tuner which is enabled to receive an I2C-bus system adaptive signal by a 3-wire bus system adaptive PLL IC. SOLUTION: This tuner is equipped with the 2-wire bus system adaptive PLL IC 3 and an enable signal generating circuit 2, two input terminals 8 a...

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1. Verfasser: YAMAGATA YUICHIRO
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To provide the electronic tuner which is enabled to receive an I2C-bus system adaptive signal by a 3-wire bus system adaptive PLL IC. SOLUTION: This tuner is equipped with the 2-wire bus system adaptive PLL IC 3 and an enable signal generating circuit 2, two input terminals 8 and 9 of the enable signal generating circuit 2 are connected to a data input terminal 5 and a clock input terminal 6 of the PLL IC 3, and an output terminal 10 of the enable signal generating circuit 2 is connected to an enable input terminal 7 of the PLL IC 3. A data signal and a clock signal which are sent through an I2C bus are inputted to the PLL IC 3 and enable signal generating circuit 2, which outputs an enable signal to the PLL IC 3.