CONTROLLING METHOD OF FAULT TOLERANCE AND REDUNDANT COMPUTER SYSTEM

PROBLEM TO BE SOLVED: To judge a transient fault due to a disturbance factor or an intermittent fault. SOLUTION: The fault tolerance controlling method mutually compares the operation states of information processing constitution elements 1a, 1b, and when non-coincidence is detected as the compared...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: KOGURE AKIRA
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To judge a transient fault due to a disturbance factor or an intermittent fault. SOLUTION: The fault tolerance controlling method mutually compares the operation states of information processing constitution elements 1a, 1b, and when non-coincidence is detected as the compared result and the generation of a fault is not detected, stores the operation states of respective elements 1a, 1b in respective storage devices 3a, 3b and compares these operation states again by reexecution processing. When both the operation states coincide with each other, respective elements 1a, 1b are allowed to continue processing, however when non-coincidence is detected, the operation states of the elements 1a, 1b obtained by the reexecution are compared with the operation states stored in the devices 3a, 3b. When non-coincidence is detected in any one of the operation states, the operation state generating non-coincidence is separated from the system, and when non-coincidence is generated in either the operation states, the operation of the system is stopped.