CLOCK OSCILLATION CIRCUIT

PROBLEM TO BE SOLVED: To provide a clock oscillation circuit by which the EMI can be reduced through clock dithering without a PLL oscillator having a clock dithering function. SOLUTION: A capacitor 8 switched by a transistor(TR) 7 is provided in parallel with a capacitor 4 of an oscillation circuit employing a crystal oscillator or ceramic oscillator 2 to switch (6) the TR 7 by a modulation frequency so as to attain clock dithering. The static capacitance of the capacitor of the clock oscillation circuit is changed by a signal from a modulation oscillation circuit 6 to apply the clock dithering to a reference clock so as to reduce the generated EMI level.