CLOCK PHASE ERROR DETECTION CIRCUIT AND CLOCK PHASE ERROR DETECTION METHOD

CLOCK PHASE ERROR DETECTION CIRCUIT AND CLOCK PHASE ERROR DETECTION METHOD

PROBLEM TO BE SOLVED: To obtain a clock phase error signal satisfying clock reproducing performance at a low C/N to be used for correcting the phase of a reproduced clock in a clock reproducing circuit. SOLUTION: The clock phase error detection circuit for obtaining a clock phase error signal for co...

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Bibliographische Detailangaben
Hauptverfasser: NISHIKAWA MASAKI, KOMATSU SUSUMU
Format: Patent
Sprache:eng
Schlagworte:
AUTOMATIC CONTROL, STARTING, SYNCHRONISATION, OR STABILISATIONOF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
BASIC ELECTRONIC CIRCUITRY
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHICCOMMUNICATION
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Zusammenfassung:PROBLEM TO BE SOLVED: To obtain a clock phase error signal satisfying clock reproducing performance at a low C/N to be used for correcting the phase of a reproduced clock in a clock reproducing circuit. SOLUTION: The clock phase error detection circuit for obtaining a clock phase error signal for correcting the phase of a reproduced clock to be used for a circuit for reproducing a clock synchronized with a prescribed phase from a band-limited pulse code signal is provided with a decision means 2 for detecting the code pattern of a signal obtained by sampling the pulse code signal by the clock and deciding the pattern and a phase error calculation means 1 for finding out a phase error from the decided code pattern and the sampled signal by a prescribed operation.