SEMICONDUCTOR MEMORY DEVICE

PROBLEM TO BE SOLVED: To stably transmit a signal by generating a signal which stores an external signal inputted from an external circuit in a latching circuit, in response to a control signal and generating a pulse in response to the control signal. SOLUTION: When a control signal ypc is inputted...

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Bibliographische Detailangaben
Hauptverfasser: BE SONKO, KAN SHOKI
Format: Patent
Sprache:eng
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Zusammenfassung:PROBLEM TO BE SOLVED: To stably transmit a signal by generating a signal which stores an external signal inputted from an external circuit in a latching circuit, in response to a control signal and generating a pulse in response to the control signal. SOLUTION: When a control signal ypc is inputted at low level, an NMOS transistor G19 is turned on, and the latch circuit constituted of two inverters I156, I11 stores high data. When the control signal ypc is inputted at a high level, the NMOS transistor G19 is turned off, and potential of a node N10 is floated, and an internal address is generated. A pre-charge means 11 with an inverter I17 which inverts the control signal ypc inputs the output of the inverter I17 and a an existing pre-charge signal add-tce, and since it contains a NAND gate 30 making NOR, a PMOS transistor P12 is turned on to be pre-charge, and the stability of the output can be increased.