IMPURITY DIFFUSING METHOD, MANUFACTURE OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
PROBLEM TO BE SOLVED: To avoid forming an i-layer at a p-n junction interface or suppress forming of the i-layer and raise the surface donor density Nd by heat treating Ga from the surface of a p-type II-VI compound semiconductor crystal in a specified temperature range for a specified time or less...
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creator | NISHIZAWA JUNICHI SAKURAI FUMITOSHI |
description | PROBLEM TO BE SOLVED: To avoid forming an i-layer at a p-n junction interface or suppress forming of the i-layer and raise the surface donor density Nd by heat treating Ga from the surface of a p-type II-VI compound semiconductor crystal in a specified temperature range for a specified time or less to form a p-n junction. SOLUTION: A quartz ampul 1' is moved at a predetermined lowering velocity to a furnace high temperature part shown by point C to rapidly raise the temperature of the ampul 1' at a given temperature rise rate while the temperature is monitored by a thermocouple 3, and immediately after a target maximum temperature of the ampul 1' is reached, it is pulled up near an inlet of an electric furnace 12. The furnace maximum temperature at point B is adjusted so that the Ga diffusion time is 120 sec or less while the temperature of a p-type ZeSe wafer is in a range of 800-1200 deg.C, and the ampul 1' is moved up/down to diffuse Ga in a p-type ZeSe thin film layer. |
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SOLUTION: A quartz ampul 1' is moved at a predetermined lowering velocity to a furnace high temperature part shown by point C to rapidly raise the temperature of the ampul 1' at a given temperature rise rate while the temperature is monitored by a thermocouple 3, and immediately after a target maximum temperature of the ampul 1' is reached, it is pulled up near an inlet of an electric furnace 12. The furnace maximum temperature at point B is adjusted so that the Ga diffusion time is 120 sec or less while the temperature of a p-type ZeSe wafer is in a range of 800-1200 deg.C, and the ampul 1' is moved up/down to diffuse Ga in a p-type ZeSe thin film layer.</description><edition>7</edition><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; DEVICES USING STIMULATED EMISSION ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2000</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20000428&DB=EPODOC&CC=JP&NR=2000124146A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25543,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20000428&DB=EPODOC&CC=JP&NR=2000124146A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>NISHIZAWA JUNICHI</creatorcontrib><creatorcontrib>SAKURAI FUMITOSHI</creatorcontrib><title>IMPURITY DIFFUSING METHOD, MANUFACTURE OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE</title><description>PROBLEM TO BE SOLVED: To avoid forming an i-layer at a p-n junction interface or suppress forming of the i-layer and raise the surface donor density Nd by heat treating Ga from the surface of a p-type II-VI compound semiconductor crystal in a specified temperature range for a specified time or less to form a p-n junction. SOLUTION: A quartz ampul 1' is moved at a predetermined lowering velocity to a furnace high temperature part shown by point C to rapidly raise the temperature of the ampul 1' at a given temperature rise rate while the temperature is monitored by a thermocouple 3, and immediately after a target maximum temperature of the ampul 1' is reached, it is pulled up near an inlet of an electric furnace 12. The furnace maximum temperature at point B is adjusted so that the Ga diffusion time is 120 sec or less while the temperature of a p-type ZeSe wafer is in a range of 800-1200 deg.C, and the ampul 1' is moved up/down to diffuse Ga in a p-type ZeSe thin film layer.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>DEVICES USING STIMULATED EMISSION</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2000</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZAj39A0IDfIMiVRw8XRzCw329HNX8HUN8fB30VHwdfQLdXN0DgkNclXwd1MIdvX1dPb3cwl1DvEPUnBxDfN0dlVw9HPBKsHDwJqWmFOcyguluRmU3FxDnD10Uwvy41OLCxKTU_NSS-K9AowMDAwMjUwMTcwcjYlSBABEbTGK</recordid><startdate>20000428</startdate><enddate>20000428</enddate><creator>NISHIZAWA JUNICHI</creator><creator>SAKURAI FUMITOSHI</creator><scope>EVB</scope></search><sort><creationdate>20000428</creationdate><title>IMPURITY DIFFUSING METHOD, MANUFACTURE OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE</title><author>NISHIZAWA JUNICHI ; SAKURAI FUMITOSHI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JP2000124146A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2000</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>DEVICES USING STIMULATED EMISSION</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>NISHIZAWA JUNICHI</creatorcontrib><creatorcontrib>SAKURAI FUMITOSHI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>NISHIZAWA JUNICHI</au><au>SAKURAI FUMITOSHI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>IMPURITY DIFFUSING METHOD, MANUFACTURE OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE</title><date>2000-04-28</date><risdate>2000</risdate><abstract>PROBLEM TO BE SOLVED: To avoid forming an i-layer at a p-n junction interface or suppress forming of the i-layer and raise the surface donor density Nd by heat treating Ga from the surface of a p-type II-VI compound semiconductor crystal in a specified temperature range for a specified time or less to form a p-n junction. SOLUTION: A quartz ampul 1' is moved at a predetermined lowering velocity to a furnace high temperature part shown by point C to rapidly raise the temperature of the ampul 1' at a given temperature rise rate while the temperature is monitored by a thermocouple 3, and immediately after a target maximum temperature of the ampul 1' is reached, it is pulled up near an inlet of an electric furnace 12. The furnace maximum temperature at point B is adjusted so that the Ga diffusion time is 120 sec or less while the temperature of a p-type ZeSe wafer is in a range of 800-1200 deg.C, and the ampul 1' is moved up/down to diffuse Ga in a p-type ZeSe thin film layer.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
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subjects | BASIC ELECTRIC ELEMENTS DEVICES USING STIMULATED EMISSION ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
title | IMPURITY DIFFUSING METHOD, MANUFACTURE OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE |
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