PROGRAMMABLE CLOCK CIRCUIT

PROBLEM TO BE SOLVED: To obtain a clock circuit which generates programmable timing signals by making the clock circuit have a phase clock driver etc., which generates a phase clock signal corresponding to a phase shift signal and a control word. SOLUTION: In the programmable clock circuit, a memory...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: WODNICKI ROBERT GIDEON, FRANK PAUL ANDREW, HARRISON DANIEL DAVID, MCGRATH DONALD THOMAS
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:PROBLEM TO BE SOLVED: To obtain a clock circuit which generates programmable timing signals by making the clock circuit have a phase clock driver etc., which generates a phase clock signal corresponding to a phase shift signal and a control word. SOLUTION: In the programmable clock circuit, a memory block 130 is able to store a specific number of control words 80. A time counter 180 is coupled with a main clock signal 240 and generates a time count signal 182 corresponding to the main clock signal 240. A comparator 190 is coupled with the memory block 130 and generates a phase shift signal 192 corresponding to a discrepancy between the main clock signal 240 and control word 80. Then a phase clock driver 60 is coupled with the comparator 190 and further coupled with the memory block 130 and generates at least one phase clock signal corresponding to respective phase shift signals 192 and respective control words 80.