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PROBLEM TO BE SOLVED: To lower power consumption and to improve the signal-to-noise ratio(SNR) of output by providing an addition circuit using (n) analog arithmetic circuits which output specified (n) sums from the output of n×n multiplication means. SOLUTION: A sample-and-hold circuit time sequentially and successively samples direct spread spectrum reception signal as input signals. Six sample signals, for example, held after sampling are inputted to the respective columns of a multiplication circuit array. A spread code register stores a spread code and the output is supplied to the multiplication circuit array. The addition circuit turns a capacitor inside a multiplication circuit array cell to an input capacitor and adds and outputs the output of the respective multiplication circuit array cells for respective rows. Then, in this case, the addition circuit uses (n) analog arithmetic circuits for outputting (n) sums expressed by an equation from the output oft the n×n multiplication means.