MOUNTING BOARD FOR ELECTRONIC COMPONENT AND ITS TEST METHOD
PROBLEM TO BE SOLVED: To obtain a test method wherein a boundary-scan corresponding component on a board on which boundary-scan corresponding components and non- boundary-scan corresponding components are mounted so as to be mixed can be tested in a short time without using an exclusive jig. SOLUTIO...
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creator | IIDA MASAYOSHI |
description | PROBLEM TO BE SOLVED: To obtain a test method wherein a boundary-scan corresponding component on a board on which boundary-scan corresponding components and non- boundary-scan corresponding components are mounted so as to be mixed can be tested in a short time without using an exclusive jig. SOLUTION: A test circuit 4 which is connected to a boundary-scan corresponding component 2 so as to exchange test data is installed. A test control part 3 by which a TAP controller 28 in the boundary-scan corresponding component 2 and the test circuit 4 are controlled is installed. The test data is transmitted from the test control part 3, it is passed in the order of the boundary-scan corresponding component 2, the test circuit 4 and the boundary-scan corresponding component 2, and the test data is received by the test control part 3. The received data is collated with an expected value so as to be tested. |
format | Patent |
fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_JP2000039463A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>JP2000039463A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_JP2000039463A3</originalsourceid><addsrcrecordid>eNrjZLD29Q_1C_H0c1dw8ncMclFw8w9ScPVxdQ4J8vfzdFZw9vcN8Pdz9QtRcPRzUfAMCVYIcQ0OUfB1DfHwd-FhYE1LzClO5YXS3AxKbq4hzh66qQX58anFBYnJqXmpJfFeAUYGQGBsaWJm7GhMlCIALMApqw</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>MOUNTING BOARD FOR ELECTRONIC COMPONENT AND ITS TEST METHOD</title><source>esp@cenet</source><creator>IIDA MASAYOSHI</creator><creatorcontrib>IIDA MASAYOSHI</creatorcontrib><description>PROBLEM TO BE SOLVED: To obtain a test method wherein a boundary-scan corresponding component on a board on which boundary-scan corresponding components and non- boundary-scan corresponding components are mounted so as to be mixed can be tested in a short time without using an exclusive jig. SOLUTION: A test circuit 4 which is connected to a boundary-scan corresponding component 2 so as to exchange test data is installed. A test control part 3 by which a TAP controller 28 in the boundary-scan corresponding component 2 and the test circuit 4 are controlled is installed. The test data is transmitted from the test control part 3, it is passed in the order of the boundary-scan corresponding component 2, the test circuit 4 and the boundary-scan corresponding component 2, and the test data is received by the test control part 3. The received data is collated with an expected value so as to be tested.</description><edition>7</edition><language>eng</language><subject>MEASURING ; MEASURING ELECTRIC VARIABLES ; MEASURING MAGNETIC VARIABLES ; PHYSICS ; TESTING</subject><creationdate>2000</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20000208&DB=EPODOC&CC=JP&NR=2000039463A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25542,76289</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20000208&DB=EPODOC&CC=JP&NR=2000039463A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>IIDA MASAYOSHI</creatorcontrib><title>MOUNTING BOARD FOR ELECTRONIC COMPONENT AND ITS TEST METHOD</title><description>PROBLEM TO BE SOLVED: To obtain a test method wherein a boundary-scan corresponding component on a board on which boundary-scan corresponding components and non- boundary-scan corresponding components are mounted so as to be mixed can be tested in a short time without using an exclusive jig. SOLUTION: A test circuit 4 which is connected to a boundary-scan corresponding component 2 so as to exchange test data is installed. A test control part 3 by which a TAP controller 28 in the boundary-scan corresponding component 2 and the test circuit 4 are controlled is installed. The test data is transmitted from the test control part 3, it is passed in the order of the boundary-scan corresponding component 2, the test circuit 4 and the boundary-scan corresponding component 2, and the test data is received by the test control part 3. The received data is collated with an expected value so as to be tested.</description><subject>MEASURING</subject><subject>MEASURING ELECTRIC VARIABLES</subject><subject>MEASURING MAGNETIC VARIABLES</subject><subject>PHYSICS</subject><subject>TESTING</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2000</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZLD29Q_1C_H0c1dw8ncMclFw8w9ScPVxdQ4J8vfzdFZw9vcN8Pdz9QtRcPRzUfAMCVYIcQ0OUfB1DfHwd-FhYE1LzClO5YXS3AxKbq4hzh66qQX58anFBYnJqXmpJfFeAUYGQGBsaWJm7GhMlCIALMApqw</recordid><startdate>20000208</startdate><enddate>20000208</enddate><creator>IIDA MASAYOSHI</creator><scope>EVB</scope></search><sort><creationdate>20000208</creationdate><title>MOUNTING BOARD FOR ELECTRONIC COMPONENT AND ITS TEST METHOD</title><author>IIDA MASAYOSHI</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_JP2000039463A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2000</creationdate><topic>MEASURING</topic><topic>MEASURING ELECTRIC VARIABLES</topic><topic>MEASURING MAGNETIC VARIABLES</topic><topic>PHYSICS</topic><topic>TESTING</topic><toplevel>online_resources</toplevel><creatorcontrib>IIDA MASAYOSHI</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>IIDA MASAYOSHI</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>MOUNTING BOARD FOR ELECTRONIC COMPONENT AND ITS TEST METHOD</title><date>2000-02-08</date><risdate>2000</risdate><abstract>PROBLEM TO BE SOLVED: To obtain a test method wherein a boundary-scan corresponding component on a board on which boundary-scan corresponding components and non- boundary-scan corresponding components are mounted so as to be mixed can be tested in a short time without using an exclusive jig. SOLUTION: A test circuit 4 which is connected to a boundary-scan corresponding component 2 so as to exchange test data is installed. A test control part 3 by which a TAP controller 28 in the boundary-scan corresponding component 2 and the test circuit 4 are controlled is installed. The test data is transmitted from the test control part 3, it is passed in the order of the boundary-scan corresponding component 2, the test circuit 4 and the boundary-scan corresponding component 2, and the test data is received by the test control part 3. The received data is collated with an expected value so as to be tested.</abstract><edition>7</edition><oa>free_for_read</oa></addata></record> |
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subjects | MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS TESTING |
title | MOUNTING BOARD FOR ELECTRONIC COMPONENT AND ITS TEST METHOD |
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