DATA PROCESSOR AND DATA PROCESSING SYSTEM

PROBLEM TO BE SOLVED: To prevent any useless power from being consumed by an input initial stage latch circuit or output final stage latch circuit for an outside interface. SOLUTION: While being linked with the control of clock supply/supply stop for a bus controller 13 or a circuit module such as peripheral circuits 20-22, the supply/supply stop control of a clock signal is also precisely operated for each latch circuit 303 and 310-312 for an outside interface in a clock synchronizing operation configuration such as an input initial stage latch circuit or output final stage latch circuit connected with those circuits. Thus, the power consumption of the data processor can be reduced.