CIRCUITO INTEGRATO COMPRENDENTE TRANSISTOR AD EFFETTO DI CAMPO LOGICI E DI POTENZA

PURPOSE: To provide a resistivity value required for a logic circuit and simultaneously provide an improved resistivity level for a power transistor, by providing double epitaxial layers on a substrate. CONSTITUTION: A substrate 10 has a buried isolation region 11. A first epitaxial layer 12 covers the buried isolation region 11 and the substrate 10. A second epitaxial layer 13 covers the first epitaxial layer 12. A P+ isolation region 14 extends from the surface of the second epitaxial layer 13 to the buried isolation layer 11. A small-signal or logical MOS field-effect transistor is formed in the second epitaxial layer 13 within an isolation region formed by the isolation barrier 14 and the buried isolation region 11.