CIRCUITO ESTRATTORE DEI SEGNALI DI TEMPORIZZAZIONE DAL RICEVITORE DI UN MODEM PER TRASMISSIONE DI DATI

A digital timing recovery circuit operative upon digital samples of the input signal to a data receiver provided at the sample rate to produce a clock correction signal at the symbol rate utilizing a digital periodic filter providing a double restrictive bandpass characteristic about the band edge f...

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1. Verfasser: PHILIP FREDERICK KROMER III
Format: Patent
Sprache:ita
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Beschreibung
Zusammenfassung:A digital timing recovery circuit operative upon digital samples of the input signal to a data receiver provided at the sample rate to produce a clock correction signal at the symbol rate utilizing a digital periodic filter providing a double restrictive bandpass characteristic about the band edge frequencies and outputting to a nonlinear device followed by a digital sampling filter designed to require only addition and subtraction of the nonlinear device outputs.