FAIL SAFE CIRCUIT
Apparatus for preventing output of an input signal is disclosed, which comprises a signal control unit comprising a buffering unit having an input and an output, the buffering unit arranged to receive an input signal and pass the input signal to the output when the buffering unit is powered. A negat...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | Apparatus for preventing output of an input signal is disclosed, which comprises a signal control unit comprising a buffering unit having an input and an output, the buffering unit arranged to receive an input signal and pass the input signal to the output when the buffering unit is powered. A negative power supply terminal of the buffering unit is supplied by a power source. The signal control unit also comprises a boost circuit to boost the voltage of the power source and supply either the voltage of the power source or the boosted voltage to a positive power supply terminal of the buffering unit. The buffering unit is powered when the boosted voltage is supplied to the buffering unit and the buffering unit is not powered when voltage of the power supply terminal is supplied to the positive power supply terminal of the buffering unit. |
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