Tiling display apparatus and output synchronization method thereof

A tiling display apparatus comprises: a first display group including first timing controllers TCON #1-1, TCON #1-2 to receive a first input data enable (IDE) signal from a first system chip SET 1, the first IDE signal having a first delay; and a second display group including second timing controllers TCON #2-1, TCON #2-2 to receive a second IDE signal from a second system chip SET 2, the second IDE signal having a second delay, wherein the first timing controllers and the second timing controllers share input delay information about the delay of the first IDE signal and input delay information about the delay of the second IDE signal with each other, and each of the timing controllers generate a common output data enable signal based on the shared input delay information. A second display device where the longest delay is selected as the output delay is also presented. A third display device comprising a plurality of interfaces between the timing controllers and their corresponding system chips and between the different timing controllers is also presented.