CFET with independent gate control and low parasitic capacitance

A semiconductor structure is provided that includes a second nanosheet device of a second conductivity type stacked over a first nanosheet device of a first conductivity type that is different from the second conductivity type. Each of the first and second nanosheet devices includes at least one sem...

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Bibliographische Detailangaben
Hauptverfasser: Juntao Li, Ruilong Xie, Kangguo Cheng, Carl Radens
Format: Patent
Sprache:eng
Schlagworte:
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