Interrupt controller, apparatus, interrupt control method and computer-readable medium

An interrupt controller controls signalling of a given interrupt having a given interrupt identifier to a target interrupt handling context, by controlling one or more memory write requests to be issued in accordance with a coherency protocol supported by a cache coherent interconnect, to maintain a...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Christoffer Dall, Marc Zyngier
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!