Processing unit for performing multiply-accumulate operations

A processing unit is described that comprises a multiply-accumulate engine and a control unit. The engine comprises a plurality of dot product units, switching circuitry, a plurality of adders, and a plurality of accumulators. The switching circuitry is coupled between the dot product units and the adders, and is configurable to selectively couple each of the adders to one of the plurality of dot product units. Each of the adders is associated with a respective accumulator of the plurality of accumulators. In a processing cycle, each of the dot product units is configured to output a product value, the control unit is operable to configure the switching circuitry such that each of the adders is coupled to a selected dot product unit of the plurality of dot product units, and each of the adders is configured to add the product value of the selected dot product unit to an accumulated value stored by the respective accumulator.