Processing matrix vector multiplication

A size M×N sparse matrix, including zero values, is multiplied with a size N vector, using a processor arrangement. A data storage linked to the processor arrangement stores the matrix in a compressed formal. Zero values are not stored. The data storage stores the vector as vector parts, each of a r...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Christiaan Baaij, Peter Baldwin, David Page, Jonathan Shipton, Jonathan Fowler, Graham Hazel
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:A size M×N sparse matrix, including zero values, is multiplied with a size N vector, using a processor arrangement. A data storage linked to the processor arrangement stores the matrix in a compressed formal. Zero values are not stored. The data storage stores the vector as vector parts, each of a respective size Ki, 1