Data processing

A data processing apparatus comprises at least one memory 810 such as a cache memory, processing circuitry to access data in the memory, and memory built-in self-test (MBIST) circuitry configured to perform a test procedure for testing a target location of the memory. The test procedure comprises wr...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Mark Gerald Lavine, Alan Jeremy Becker
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A data processing apparatus comprises at least one memory 810 such as a cache memory, processing circuitry to access data in the memory, and memory built-in self-test (MBIST) circuitry configured to perform a test procedure for testing a target location of the memory. The test procedure comprises writing test data to the target memory location. Diagnostic circuitry, e.g. an embedded logic analyser (ELA), executes a diagnostic procedure to generate diagnostic data in response to processing operations performed by the processor. The MBIST circuitry controls writing of the diagnostic data to memory locations in a temporarily reserved memory region comprising at least a portion of the memory. Other regions of the memory remain available to the processor. The diagnostic data may remain in the temporarily locked memory region until read out by an external debugger. Using regular memory for short-term storage of trace data avoids the need for dedicated diagnostic memory.