Methods and circuits
Disclosed are methods of forming connection targets 101 for customisable integrated circuits (lCs) providing for selective interconnection of conductive tracks to interconnect devices and/or external terminals of the ICs by deposition of conductive dots 80, for instance by printing, onto the targets...
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creator | Simon Dominic Ogier |
description | Disclosed are methods of forming connection targets 101 for customisable integrated circuits (lCs) providing for selective interconnection of conductive tracks to interconnect devices and/or external terminals of the ICs by deposition of conductive dots 80, for instance by printing, onto the targets. Customisable and customised ICs having the connection targets are also provided, asare methods for their formation and use. The connection targets are formed of an aperture 70 in an insulating layer between first and second conductive tracks 20, 40, with a gap in the second track, at the aperture, providing an open circuit between the first and second conductive tracks which may be closed by depositing a conductive dot 80 onto the connection target to conductively bridge the gap. |
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Customisable and customised ICs having the connection targets are also provided, asare methods for their formation and use. The connection targets are formed of an aperture 70 in an insulating layer between first and second conductive tracks 20, 40, with a gap in the second track, at the aperture, providing an open circuit between the first and second conductive tracks which may be closed by depositing a conductive dot 80 onto the connection target to conductively bridge the gap.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PRINTED CIRCUITS ; SEMICONDUCTOR DEVICES</subject><creationdate>2017</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20170802&DB=EPODOC&CC=GB&NR=2546761A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20170802&DB=EPODOC&CC=GB&NR=2546761A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Simon Dominic Ogier</creatorcontrib><title>Methods and circuits</title><description>Disclosed are methods of forming connection targets 101 for customisable integrated circuits (lCs) providing for selective interconnection of conductive tracks to interconnect devices and/or external terminals of the ICs by deposition of conductive dots 80, for instance by printing, onto the targets. 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subjects | BASIC ELECTRIC ELEMENTS CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PRINTED CIRCUITS SEMICONDUCTOR DEVICES |
title | Methods and circuits |
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