Techniques for handling interrupts in a processing unit using virtual processor thread groups

A method for handling interrupts in a data processing system comprises receiving, at an interrupt presentation controller (IPC), an event notification message (ENM). The ENM specifies an event target number, a number of bits to ignore, an event source number, and an event priority. The IPC determine...

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Bibliographische Detailangaben
Hauptverfasser: Richard Louis Arndt, Florian Alexander Auernhammer
Format: Patent
Sprache:eng
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Zusammenfassung:A method for handling interrupts in a data processing system comprises receiving, at an interrupt presentation controller (IPC), an event notification message (ENM). The ENM specifies an event target number, a number of bits to ignore, an event source number, and an event priority. The IPC determines a group of virtual processor threads that may be potentially interrupted based on the event target number and the number of bits to ignore specified in the ENM. The event target number identifies a specific virtual processor thread and the number of bits to ignore identifies the number of lower-order bits to ignore with respect to the specific virtual processor thread when determining a group of virtual processor threads that may be potentially interrupted. Preferably, when the number of bits to ignore is n bits, then the virtual processor thread and 2n-1 other virtual processing threads may be potentially interrupted. Preferably, when the number of bits to ignore is non-zero, the method further comprises determining whether virtual processor thread(s) are dispatched and operating on an associated physical processor, and in response to no virtual processor thread within the group being dispatched and operating, issuing a reject message to the notification source specified in the ENM.