Hardware based coherency between a data processing device and interconnect

There is provided a data processing device 200 including an output port 240 to transmit a request value to an interconnect 300 arranged to implement a coherency protocol, to indicate a request to be subjected to the coherency protocol. An input port 235 receives an acknowledgement value from the interconnect in response to the request value and coherency administration circuitry 220 defines behaviour rules for the data processing device in accordance with the coherency protocol and in dependence on the request value and the acknowledgement value. Storage circuitry administers data in accordance with the behaviour rules.