Graphics processing systems

A graphics processing pipeline comprises a tessellation stage 10 operable to tessellate a patch representing some or all of an object to be rendered, so as to generate positions for a set of vertices for one or more output primitives, and a primitive assembly stage 20 operable to assemble one or mor...

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Bibliographische Detailangaben
1. Verfasser: David Robert Shreiner
Format: Patent
Sprache:eng
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Zusammenfassung:A graphics processing pipeline comprises a tessellation stage 10 operable to tessellate a patch representing some or all of an object to be rendered, so as to generate positions for a set of vertices for one or more output primitives, and a primitive assembly stage 20 operable to assemble one or more output primitives for processing using the positions for a set of vertices generated by the tessellation stage and pre-defined information defining the connectivity between at least some of the vertices of the set of vertices.