Chip pads
A pad driver 53 incorporates a transparent latch 43 which stores the signal 44 from the IC core under control of a latching signal 45, thereby enabling a valid pad output to be provided despite the IC core being unpowered. The latch may be used to store a logic state of the IC core, the logic state...
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Zusammenfassung: | A pad driver 53 incorporates a transparent latch 43 which stores the signal 44 from the IC core under control of a latching signal 45, thereby enabling a valid pad output to be provided despite the IC core being unpowered. The latch may be used to store a logic state of the IC core, the logic state being retrieved by the core on line 50 after the core wakes up. The core may be activated by a wake-up circuit 48 in response to application of a signal to the pad from outside the IC. The latch may be capable of storing multiple data bits. The pad driver may function as an input circuit or an output circuit or an input/output circuit. The level converter 52 is said to be capable of converting IC core logic voltages to and from input/output logic voltages irrespective of whether the core voltage 54 exceeds or is less than the input/output logic voltage 51. |
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