Implementing ordered and reliable transfer of packets

A method and circuit for implementing ordered and reliable transfer of packets while spraying packets over multiple links, and a design structure on which the subject circuit resides are provided. Each source interconnect chip maintains a spray mask including multiple available links for each destin...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: DAVID ALAN SHEDIVY, KENNETH MICHAEL VALK, PHILIP ROGERS HILLIER III, WILLIAM THOMAS FLYNN
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:A method and circuit for implementing ordered and reliable transfer of packets while spraying packets over multiple links, and a design structure on which the subject circuit resides are provided. Each source interconnect chip maintains a spray mask including multiple available links for each destination chip for spraying packets across multiple links of a local rack interconnect system. Each packet is assigned an End-to-End (ETE) sequence number in the source interconnect chip that represents the packet position in an ordered packet stream from the source device. The destination interconnect chip uses the ETE sequence numbers to reorder the received sprayed packets into the correct order before sending the packets to the destination device.