Memory protection
An integrated-circuit device (1) comprises a processor (7), non-volatile memory (13), non-volatile memory control logic (20), and memory protection logic (9). The memory protection logic (9) is arranged to control access to a protectable region of the non-volatile memory (13) in dependence on protec...
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| Format: | Patent |
| Sprache: | eng |
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| Zusammenfassung: | An integrated-circuit device (1) comprises a processor (7), non-volatile memory (13), non-volatile memory control logic (20), and memory protection logic (9). The memory protection logic (9) is arranged to control access to a protectable region of the non-volatile memory (13) in dependence on protection configuration data stored in a protection-configuration region of the non-volatile memory. The non-volatile memory control logic (20) is arranged to prevent writing to any portion of the protection-configuration region unless that portion is in an erased state. The non-volatile memory control logic (20) is further arranged to allow the protection-configuration region to be erased only if the protectable region is in an erased state. |
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