Dielectric Capacitor

A method of manufacturing a dielectric capacitor comprising providing a first electrode having a structured surface, a dielectric layer coated onto the first electrode, and a second electrode coated onto the dielectric layer; where the structured surface comprises a random array of tubes, wires or rods which extend from the substrate surface, and where the dielectric layer is deposited by atomic layer deposition. Also disclosed is a dielectric capacitor comprising a structured electrode of randomly arranged carbon nanotubes extending from a substrate surface; a dielectric layer coated onto the structured electrode; and a second electrode coated onto the dielectric layer. The structured surface may have a spacing to length ratio with a maximum of 1:30. The dielectric layer may comprise one or more of hafnium oxide, titanium dioxide, barium titanate. The second electrode may be aluminium, titanium nitride, platinum, ruffinium or galinstan. The dielectric coating may be provided as a two layer coating, the first coating provided by plasma-enhanced atomic layer deposition and a second by thermal atomic layer deposition.