CURRENT CONFINING SEMICONDUCTOR LIGHT EMISSION DIVICE

A semiconductor light emission device 200 is provided in a stacked layer arrangement with an substrate 101; an n-type layer 102; a diffusion accommodation layer 110; an active region 111, comprising a p-n (intrinsic) material and a p-type layer 112; the device further comprises a first and second di...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: KIAN-PAAU GAN
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:A semiconductor light emission device 200 is provided in a stacked layer arrangement with an substrate 101; an n-type layer 102; a diffusion accommodation layer 110; an active region 111, comprising a p-n (intrinsic) material and a p-type layer 112; the device further comprises a first and second diffusion region 130A, 130B which are formed in the p-type and active region layers through further p-type doping, terminating in the diffusion accommodation layer; whereby the diffusion regions 130 act to confine current to the central region 132. The p-type doping in the diffusion regions 130 produce p+/n junctions in the active region which may have higher threshold voltages than the p-n regions. The semiconductor light emission device 200 may also be in the form of a light emitting diode (LED) or a laser diode, more specifically a vertical cavity surface emitting laser (VCSEL).