Polysilicon devices

In sequence, a first polysilicon layer 6 is deposited then patterned, then implanted with dopant, and a second polysilicon layer 9 is subsequently deposited. The device comprises a polysilicon layer 9 disposed over a part of a first doped region 5 but not over a second doped region 7. The device may...

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Bibliographische Detailangaben
1. Verfasser: PAUL RONALD STRIBLEY
Format: Patent
Sprache:eng
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Zusammenfassung:In sequence, a first polysilicon layer 6 is deposited then patterned, then implanted with dopant, and a second polysilicon layer 9 is subsequently deposited. The device comprises a polysilicon layer 9 disposed over a part of a first doped region 5 but not over a second doped region 7. The device may be a TFT, a MOSFET, a resistor, a capacitor, a diode, antifuse or varactor.