Line swapping scheme to reduce back invalidations in a snoop filter

A snoop filter 103 is provided in a hub controller (101, see fig 1) which manages the movement of data between multiple processors (107, 111, see fig 1) and system memory (105, see fig 1). The snoop filter comprises a cache state storage structure 209 which is logically or physically subdivided into a number of affinities 211A-211D in which one affinity may be provided for each processor in the system. When a request for data is received from a processor of the plurality of processors, a cache entry location is determined based, at least in part, on the request. The request may contain a way number or way hint. The data is then stored in a cache corresponding to the processor at the cache entry location, and a coherency record corresponding to the data is stored in the affinity corresponding to the cache. Storing the coherency record in an affinity may comprise storing the record at a randomly selected location or at a location selected in accordance with a way-hint replacement policy. The method may additionally determine an occurrence of a cache hit at another cache entry location of another cache in which case storing the coherency record involves swapping the coherency record with the coherency record in the affinity corresponding to the other cache. Invalidation messages are sent to processors when entries in the affinities corresponding to the processors caches must be evicted to provide for the storage of a new coherency record.