Processor switching between secure and non-secure modes

There is a provided a data processing system comprising: a processor operable in a plurality of modes and either a secure domain or a non-secure domain including: at least one secure mode being a mode in said domain; at least one non-secure mode being a mode in said non-secure domain; and a monitor mode, wherein when said processor is executing a program in a secure mode said program has access to secure data which in not accessible when said processor is operating in a non-secure mode; and switching between said secure mode and said non-secure mode takes place via said monitor mode, said processor being operable at least partially in said monitor mode to execute a monitor program to manage switching between said secure mode and said non-secure mode.