Multiple discharge capable bit line
A memory array, comprising : a discharge device connected to a global bit line; and a feedback path from the global bit line to at least one other discharge device connected to the global bit line.
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| Format: | Patent |
| Sprache: | eng |
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| Zusammenfassung: | A memory array, comprising : a discharge device connected to a global bit line; and a feedback path from the global bit line to at least one other discharge device connected to the global bit line. |
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