A method and apparatus for saving power in dynamic circuits

A method and apparatus for saving power in dynamic circuits

An embodiment of the invention provides a circuit and method for reducing power in dynamic circuits. A large single pre-charge FET is used to pre-charge the pre-charge nodes of all dynamic logic blocks contained in a plurality of dynamic logic blocks. The large single pre-charge FET replaces all sma...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: DAVID JOHN MARSHALL, DENISE MAN, ELIAS GEDAMU
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRONIC CIRCUITRY
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
ELECTRICITY
PHYSICS
PULSE TECHNIQUE
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Beschreibung
Zusammenfassung:An embodiment of the invention provides a circuit and method for reducing power in dynamic circuits. A large single pre-charge FET is used to pre-charge the pre-charge nodes of all dynamic logic blocks contained in a plurality of dynamic logic blocks. The large single pre-charge FET replaces all smaller individual FETs that normally would be used. Because smaller FETs typically have more subthreshhold leakage than larger FETs, the overall subthreshhold leakage is reduced. The large pre-charge FET only replaces smaller pre-charge FETs that have the same pre-charge signal going to their gates.