Time delay charge integration circuit

A charge integration circuit has first and second capacitors C21 n-1 , C21 n , and first and second reference voltage supplies V ref , V x . A first switch S21 n-1 controls integration of charge from a photo diode in the first capacitor C21 n-1 and selectively resets the first capacitor to the first reference voltage. A second switch S21 n selectively resets the second capacitor C21 n to the first reference voltage. A current mirror Q1 n-1 , Q2 n-1 effects discharge of the second capacitor C21 n by a quantity of charge equivalent to the charge integrated on the first capacitor C21 n-1 so as to effectively transfer charge therebetween at the end of an integration period.