Semiconductor memory including a peripheral circuit and voltage boosting circuits

A semiconductor memory comprises a peripheral circuit comprising a MOS transistor 40, a first boosting circuit (Fig 1) for boosting a power supply voltage to provide a first boosted power supply voltage VPP at a first level to a bulk bias terminal 44 of the transistor, and a second boosting circuit (Fig 4) for boosting the power supply to provide a second boosted voltage AVPP at a second level to the source terminal of the transistor when an external input control signal is activated. Circuit details of the first and second voltage boosting circuits are described (Figs 1 and 4). The peripheral circuit is a word line driver.