DATA PORT

In a packet system a data port between a data terminal and a controlling processor uses a USART (Universal Synchronous/Asynchronous Receiver/transmitter), which in conventional practice is used as a byte-by-byte interface, with each byte to the transferred causing a separate interrupt. On a busy line or where several ports are controlled from one processor this causes many processor interrupts. To minimise this, the data incoming to the port is monitored in the port to detect preset byte combinations (e.g. message end), the presence of such a combination causing an interrupt. Bytes on reception go into a buffer, which is monitored to see how full it is. When it reaches a preset level of fullness an interrupt is also sent. In both these cases the interrupt causes data transfer to the processor. In addition the port has a buffer for the reception of data output from the processor; this is monitored and if empty the port issues an interrupt to "tell" the processor that it can receive data. These arrangements provide a significant reduction in the number of interrupts needed, which is important, especially where the processor serves a number of data ports.